AXI Interfaces are awesome because you can connect wires to them. AXI interfaces are widely used within the Xilinx and ARM ecosystem. I found it’s well worth the time to write your own code using these standard interfaces because it allows you to connect to existing infrastructure. It is, for […]
Daily archives: December 28, 2017
2 posts
To make an IP core reusable, we will need customization parameters which the user can change. In this tutorial we learn How to edit an IP core from your top-level project. How to add a parameter to the Verilog code. How to add a customization parameter to the customer-facing GUI. […]